Ankush Ghosh, J Gope, T Datta, Biplab Roy and Subir Kumar Sarkar
Keywords: Spintronics; single spin logic; miniaturization; code converter. PACS: 75.10Jm, 75.10Pq, 75.10Hk, 75.25.+z, 85.75.-d
Abstract: The main objective, however, till date remains device miniaturization to reduce unit cost per function, to improve device speed, to reduce power consumption and to improve performance. A major creative challenge which the circuit and system VLSI designers facing today is to design new generation products which can consume minimum power. Spintronic devices have the ability to provide digital system with very less power consumption. In today’s digital world, the general decimal numbers have almost their significance and the binary digits ‘0’ and ‘1’ reign supreme. Indeed, use of digital systems has given today’s gadgets signal processing capabilities, robustness and sophistication that were unheard of when analog systems were in vogue. In the present work, a code converter is designed by employing spintronic devices where low power consumption, high operating speed and high component integration density are financially indispensable. The system is designed for four bits. The different codes that are considered in this circuit are binary, BCD, Gray and excess-3. This conversion system can be extended for any number of bits by cascading technique.
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