Canadian Journal of Pure & Applied Sciences

Abstract: In this paper we have studied the threshold voltage sensitivity to process variation like channel length, silicon film thickness (tSi) and gate oxide thickness (tOX) in undoped symmetric Double gate (SDG) metal oxide semiconductor field effect transistors (MOSFETs) after developing an analytical model of threshold voltage (VTh). In the proposed model we have introduced a parameter ? to take care of Drain-induced barrier lowering (DIBL) effect and quantum confinement effect in sub micron SDG metal oxide semiconductor (MOS) devices. To verify the validity of our developed model, we have compared the simulation results of threshold voltage model with two-dimensional MINIMOS simulator results and found a close agreement. These analytical expressions for sensitivity are solved numerically and compared with published results. The analytical expressions of the sensitivity strongly depend on the device parameter combinations. The study suggests that the threshold voltage sensitivity to length imposes a serious constrain on the scaling of SDG MOS devices. The VTh sensitivity to tOX is not a serious issue for longer SDG MOS devices whereas in deep sub-micron regime, its effect can not be ignored which put restriction on the choice of the gate oxide thickness value.